36 search results - page 2 / 8 » Behavioral synthesis of asynchronous systems: a methodology |
FMSD
2006
13 years 8 months ago
2006
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc sy...
DATE
2000
IEEE
14 years 29 days ago
2000
IEEE
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
ISSS
2000
IEEE
14 years 28 days ago
2000
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
DAC
1995
ACM
14 years 3 days ago
1995
ACM
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
VLSID
2003
IEEE
14 years 9 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...