32 search results - page 2 / 7 » Benchmark Circuits Improve the Quality of a Standard Cell Li... |
ISPD
1997
ACM
13 years 11 months ago
1997
ACM
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
ASPDAC
2011
ACM
12 years 10 months ago
2011
ACM
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
ASPDAC
1999
ACM
13 years 11 months ago
1999
ACM
In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
ASPDAC
2006
ACM
14 years 20 days ago
2006
ACM
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...
DAC
1994
ACM
13 years 10 months ago
1994
ACM
A new partitioningapproach for very largecircuits is described. We demonstrate that applying a recently developed analytical placement algorithm, that pro ts from a linear objecti...