436 search results - page 11 / 88 » Benchmarking and hardware implementation of JPEG-LS |
HPCC
2009
Springer
13 years 11 months ago
2009
Springer
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
Asynchronous circuit implementations operating under strong constraints (DIMS, Direct Logic, some of NCL gates, etc.) are attractive due to: 1) regularity; 2) combined implementati...
SBACPAD
2003
IEEE
14 years 27 days ago
2003
IEEE
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— Driven by the need for higher bandwidth and complexity reduction, off-chip interconnect has evolved from proprietary busses to networked architectures. A similar evolution is o...