436 search results - page 33 / 88 » Benchmarking and hardware implementation of JPEG-LS |
HPCA
2008
IEEE
14 years 10 months ago
2008
IEEE
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...
ASPDAC
2005
ACM
14 years 3 months ago
2005
ACM
A new paradigm is introduced for floorplanning any combination of fixed-shape and variable-shape blocks under tight fixedoutline area constraints and a wirelength objective. Dra...
MICRO
2008
IEEE
14 years 4 months ago
2008
IEEE
—Transactional memory (TM) is a promising paradigm for helping programmers take advantage of emerging multicore platforms. Though they perform well under low contention, hardware...
ARC
2006
Springer
14 years 1 months ago
2006
Springer
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
CAV
2009
Springer
14 years 10 months ago
2009
Springer
We present the key ideas in the design and implementation of Beaver, an SMT solver for quantifier-free finite-precision bit-vector logic (QF BV). Beaver uses an eager approach, enc...