436 search results - page 4 / 88 » Benchmarking and hardware implementation of JPEG-LS |
ISMVL
2000
IEEE
14 years 6 hour ago
2000
IEEE
A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (Shared reduced ordered Binary Decision Diagrams)...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Industry vendors hesitate to disseminate proprietary applications to academia and third party vendors. By consequence, the benchmarking process is typically driven by standardized...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
Scalable heterogeneous computing systems, which are composed of a mix of compute devices, such as commodity multicore processors, graphics processors, reconfigurable processors, ...
WH
2010
13 years 2 months ago
2010
Body Sensor Networks (BSNs) consist of sensor nodes deployed on the human body for health monitoring. Each sensor node is implemented by interfacing a physiological sensor with a ...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
Recently, a dedicated hardware accelerator was proposed that works in conjunction with caches found next to modern-day microprocessors, to speedup the commonly utilized memcpy ope...