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ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
14 years 1 days ago
Circuits for wide-window superscalar processors
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...
Dana S. Henry, Bradley C. Kuszmaul, Gabriel H. Loh...
CF
2011
ACM
12 years 7 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
PLDI
2012
ACM
11 years 10 months ago
Scalable and precise dynamic datarace detection for structured parallelism
Existing dynamic race detectors suffer from at least one of the following three limitations: (i) space overhead per memory location grows linearly with the number of parallel thre...
Raghavan Raman, Jisheng Zhao, Vivek Sarkar, Martin...
APPT
2005
Springer
14 years 1 months ago
Static Partitioning vs Dynamic Sharing of Resources in Simultaneous MultiThreading Microarchitectures
Simultaneous MultiThreading (SMT) achieves better system resource utilization and higher performance because it exploits ThreadLevel Parallelism (TLP) in addition to “conventiona...
Chen Liu, Jean-Luc Gaudiot
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
14 years 1 months ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...