686 search results - page 122 / 138 » Benchmarking cerebellar control |
ACSAC
2008
IEEE
14 years 2 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
SASP
2008
IEEE
14 years 2 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
COMSWARE
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper we are concerned with finding the maximum throughput that a mobile ad hoc network can support. Even when nodes are stationary, the problem of determining the capaci...