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ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
14 years 1 months ago
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
Rafal Karakiewicz, Roman Genov
WEA
2005
Springer
109views Algorithms» more  WEA 2005»
14 years 26 days ago
Synchronization Fault Cryptanalysis for Breaking A5/1
Abstract. A5/1 pseudo-random bit generator, known from GSM networks, potentially might be used for different purposes, such as secret hiding during cryptographic hardware testing, ...
Marcin Gomulkiewicz, Miroslaw Kutylowski, Heinrich...
SENSYS
2003
ACM
14 years 19 days ago
Tracking a moving object with a binary sensor network
In this paper we examine the role of very simple and noisy sensors for the tracking problem. We propose a binary sensor model, where each sensor’s value is converted reliably to...
Javed A. Aslam, Zack J. Butler, Florin Constantin,...
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
13 years 11 months ago
A 50 Mbit/s Iterative Turbo-Decoder
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
F. Viglione, Guido Masera, Gianluca Piccinini, Mas...
MOBICOM
2010
ACM
13 years 7 months ago
Hermes: data transmission over unknown voice channels
While the cellular revolution has made voice connectivity ubiquitous in the developing world, data services are largely absent or are prohibitively expensive. In this paper, we pr...
Aditya Dhananjay, Ashlesh Sharma, Michael Paik, Ja...