613 search results - page 102 / 123 » Block cache for embedded systems |
IEEECIT
2010
IEEE
13 years 6 months ago
2010
IEEE
—Superblocks represent regions in a program code that consist of multiple basic blocks. Compilers benefit from this structure since it enables optimization across block boundari...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
WCET
2010
13 years 5 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...
DATE
2003
IEEE
14 years 25 days ago
2003
IEEE
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...