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DATE
2005
IEEE
133views Hardware» more  DATE 2005»
14 years 2 months ago
Locality-Aware Process Scheduling for Embedded MPSoCs
Utilizing on-chip caches in embedded multiprocessorsystem-on-a-chip (MPSoC) based systems is critical from both performance and power perspectives. While most of the prior work th...
Mahmut T. Kandemir, Guilin Chen
CODES
2008
IEEE
14 years 3 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
CASES
2006
ACM
14 years 2 months ago
FlashCache: a NAND flash memory file cache for low power web servers
We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...
Taeho Kgil, Trevor N. Mudge
SIGMETRICS
2005
ACM
14 years 2 months ago
The performance impact of kernel prefetching on buffer cache replacement algorithms
A fundamental challenge in improving the file system performance is to design effective block replacement algorithms to minimize buffer cache misses. Despite the well-known int...
Ali Raza Butt, Chris Gniady, Y. Charlie Hu
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
14 years 12 days ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee