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ISMVL
2005
IEEE
107views Hardware» more  ISMVL 2005»
14 years 2 months ago
Multiple-Valued Caches for Power-Efficient Embedded Systems
In this paper, we propose three novel cache models using Multiple-Valued Logic (MVL) paradigm to reduce the cache data storage area and cache energy consumption for embedded syste...
Emre Özer, Resit Sendag, David Gregg
DAC
2003
ACM
14 years 9 months ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
ICCD
2000
IEEE
94views Hardware» more  ICCD 2000»
14 years 5 months ago
A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval
This research proposes a new cache system that can increase the effect by temporal and spatial locality by using only simple hardware control without any locality detection hardwa...
Jung-Hoon Lee, Jang-Soo Lee, Shin-Dug Kim