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ICPP
1999
IEEE
13 years 12 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
RTCSA
1999
IEEE
13 years 12 months ago
Bandwidth Reservation for Real Time Traffic in Wireless Mobile Environment
This study proposes a new bandwidth reservation strategy (Two Level Guarantee) in wireless environment based on the user mobility specification which is assumed to be given at cal...
Byung-Kyu Choi, Riccardo Bettati
ECRTS
2010
IEEE
13 years 8 months ago
The Multiprocessor Bandwidth Inheritance Protocol
Abstract--In this paper, the Multiprocessor Bandwidth Inheritance (M-BWI) protocol is presented, which constitutes an extension of the Bandwidth Inheritance (BWI) protocol to symme...
Dario Faggioli, Giuseppe Lipari, Tommaso Cucinotta
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
13 years 12 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
EH
2003
IEEE
117views Hardware» more  EH 2003»
14 years 27 days ago
The Evolutionary Design and Synthesis of Non-Linear Digital VLSI Systems
This paper describes a multi-objective Evolutionary Algorithm (EA) system for the synthesis of efficient non-linear VLSI circuit modules. The EA takes the specification for a no...
Robert Thomson, Tughrul Arslan