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» Boolean factoring and decomposition of logic networks
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DAC
2003
ACM
14 years 8 months ago
A new enhanced constructive decomposition and mapping algorithm
Structuring and mapping of a Boolean function is an important problem in the design of complex integrated circuits. Libraryaware constructive decomposition offers a solution to th...
Alan Mishchenko, Xinning Wang, Timothy Kam
FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
13 years 12 months ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 7 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
BMCBI
2006
119views more  BMCBI 2006»
13 years 7 months ago
A methodology for the structural and functional analysis of signaling and regulatory networks
Background: Structural analysis of cellular interaction networks contributes to a deeper understanding of network-wide interdependencies, causal relationships, and basic functiona...
Steffen Klamt, Julio Saez-Rodriguez, Jonathan A. L...
TKDE
2010
149views more  TKDE 2010»
13 years 2 months ago
A Configurable Rete-OO Engine for Reasoning with Different Types of Imperfect Information
The RETE algorithm is a very efficient option for the development of a rule-based system, but it supports only boolean, first order logic. Many real-world contexts, instead, requir...
Davide Sottara, Paola Mello, Mark Proctor