Sciweavers

89 search results - page 5 / 18
» Boosting the Performance of Multimedia Applications Using SI...
Sort
View
PLDI
2000
ACM
13 years 12 months ago
Exploiting superword level parallelism with multimedia instruction sets
Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes pri...
Samuel Larsen, Saman P. Amarasinghe
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
14 years 12 days ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
VEE
2006
ACM
139views Virtualization» more  VEE 2006»
14 years 1 months ago
Vector LLVA: a virtual vector instruction set for media processing
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-speciļ¬...
Robert L. Bocchino Jr., Vikram S. Adve
ASAP
2009
IEEE
143views Hardware» more  ASAP 2009»
14 years 4 months ago
Scalar Processing Overhead on SIMD-Only Architectures
ā€”The Cell processor consists of a general-purpose core and eight cores with a complete SIMD instruction set. Although originally designed for multimedia and gaming, it is current...
Arnaldo Azevedo Filho, Ben H. H. Juurlink
ICMCS
2008
IEEE
336views Multimedia» more  ICMCS 2008»
14 years 1 months ago
SIMD optimization of the H.264/SVC decoder with efficient data structure
H.264/scalable video coding (SVC) is a new compression technique that can adapt to various network environments and applications. However, despite its outstanding performance, H.2...
Joohyun Lee, Gwanggil Jeon, Sangjun Park, Taeyoung...