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PG
2007
IEEE
14 years 1 months ago
Statistical Hypothesis Testing for Assessing Monte Carlo Estimators: Applications to Image Synthesis
Image synthesis algorithms are commonly compared on the basis of running times and/or perceived quality of the generated images. In the case of Monte Carlo techniques, assessment ...
Kartic Subr, James Arvo
INFOCOM
2006
IEEE
14 years 1 months ago
Backbone Topology Synthesis for Multi-Radio Meshed Wireless LANs
—Wireless local area network (WLAN) systems are widely implemented today to provide hot spot coverage. Operated typically in an infrastructure mode, each WLAN is managed by an ac...
Laura Huei-jiun Ju, Izhak Rubin
RTSS
1998
IEEE
13 years 11 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...
ISPD
2012
ACM
283views Hardware» more  ISPD 2012»
12 years 2 months ago
Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...
ASAP
2006
IEEE
106views Hardware» more  ASAP 2006»
14 years 1 months ago
Throughput Optimized SHA-1 Architecture Using Unfolding Transformation
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede