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RTCSA
2009
IEEE
14 years 2 months ago
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...
Daniel Grund, Jan Reineke, Gernot Gebhard
IEEEPACT
1998
IEEE
13 years 11 months ago
Static Methods in Hybrid Branch Prediction
Hybrid branch predictors combine the predictions of multiple single-level or two-level branch predictors. The prediction-combining hardware -- the "meta-predictor" -may ...
Dirk Grunwald, Donald C. Lindsay, Benjamin G. Zorn
SAMOS
2007
Springer
14 years 1 months ago
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction
In this paper, we use the CoDeL hardware design platform to analyze the potential and performance impact of power gating individual registers. For each register, we examine the per...
Nainesh Agarwal, Nikitas J. Dimopoulos
ICCD
2003
IEEE
107views Hardware» more  ICCD 2003»
14 years 4 months ago
Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...
Sudeep Pasricha, Alexander V. Veidenbaum
MICRO
2003
IEEE
70views Hardware» more  MICRO 2003»
14 years 25 days ago
Fast Path-Based Neural Branch Prediction
Microarchitectural prediction based on neural learning has received increasing attention in recent years. However, neural prediction remains impractical because its superior accur...
Daniel A. Jiménez