This paper describes an experimental study of Linux kernel behavior in the presence of errors that impact the instruction stream of the kernel code. Extensive error injection exper...
Weining Gu, Zbigniew Kalbarczyk, Ravishankar K. Iy...
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
This paper explores a topological perspective of planning in the presence of uncertainty, focusing on tasks specified by goal states in discrete spaces. The paper introduces stra...
We present a methodology for microarchitectural customization of embedded processors by exploiting application information, thus attaining the twin benefits of processor standardi...
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...