68 search results - page 8 / 14 » Buffered Crossbar Fabrics Based on Networks on Chip |
CICC
2011
12 years 7 months ago
2011
Efforts to achieve the long-standing dream of realizing scalable learning algorithms for networks of spiking neurons in silicon have been hampered by (a) the limited scalability of...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
We have presented an optimal on-chip buffer allocation and buffer insertion methodology which uses stochastic models of the architecture. This methodology uses finite buffer s...
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
The performance of system-on-chip is determined not only by the performance of its functional units, but also by how efficiently they cooperate with one another. It is the on-chip...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
ASYNC
2005
IEEE
14 years 1 months ago
2005
IEEE
Networks on Chip that can guarantee Quality of Service (QNoC) are based on special routers that can support multiple service levels. GALS SoCs call for asynchronous NoC implementa...