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» C and Operating Systems Performance: A Case Study
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GLVLSI
2009
IEEE
151views VLSI» more  GLVLSI 2009»
14 years 1 months ago
Reliability aware NoC router architecture using input channel buffer sharing
To address the increasing demand for reliability in on-chip networks, we proposed a novel Reliability Aware Virtual channel (RAVC) NoC router micro-architecture that enables both ...
Mohammad Hossein Neishaburi, Zeljko Zilic
WOSP
2005
ACM
14 years 2 months ago
Applying SPE techniques for modeling a grid-enabled JAVA platform
Advances in Internet and the availability of powerful computers and high-speed networks have propitiated the rise of Grids. The scheduling of applications is complex in Grids due ...
Mariela Curiel, M. Angélica Pérez, R...
ACISP
2000
Springer
14 years 1 months ago
High Performance Agile Crypto Modules
This paper examines the impact of the primary symmetric key cryptographic operation on network data streams, encryption of user data, have on the overall tra c throughput. The encr...
Chandana Gamage, Jussipekka Leiwo, Yuliang Zheng
CEC
2005
IEEE
14 years 2 months ago
Constraint quadratic approximation operator for treating equality constraints with genetic algorithms
Abstract- This paper presents a new operator for genetic algorithms that enhances their convergence in the case of nonlinear problems with nonlinear equality constraints. The propo...
Elizabeth F. Wanner, Frederico G. Guimarães...
SBCCI
2004
ACM
127views VLSI» more  SBCCI 2004»
14 years 2 months ago
A formal software synthesis approach for embedded hard real-time systems
Software synthesis is defined as the task of translating a specification into a software program, in a general purpose language, in such a way that this software can be compiled...
Raimundo S. Barreto, Marília Neves, Meuse N...