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» C Compiler Design for an Industrial Network Processor
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FPL
2006
Springer
105views Hardware» more  FPL 2006»
14 years 2 days ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
14 years 12 days ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...
RTSS
1996
IEEE
14 years 17 days ago
Middleware for Distributed Industrial Real-Time Systems on ATM Networks
In this paper we address the problem of middleware design for constructing ATM LAN based distributed industrial plant monitoring and control systems. In particular, we present a re...
Ichiro Mizunuma, Chia Shen, Morikazu Takegaki
JSA
2007
123views more  JSA 2007»
13 years 8 months ago
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Ch...
Holger Blume, Thorsten von Sydow, Daniel Becker, T...
CASES
2004
ACM
14 years 1 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh