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» C Compiler Design for an Industrial Network Processor
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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 8 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
TRIDENTCOM
2010
IEEE
13 years 6 months ago
ASSERT: A Wireless Networking Testbed
Abstract. As wireless networks become a critical part of home, business and industrial infrastructure, researchers will meet these demands by providing new networking technologies....
Ehsan Nourbakhsh, Jeff Dix, Paul Johnson, T. Ryan ...
SUTC
2008
IEEE
14 years 2 months ago
An Embedded Computing Platform for Robot
As the robotic industry is growing boomingly, the functionalities and system's architecture of robots are more and more complex. The development of robotic application system...
Ching-Han Chen, Sz-Ting Liou
ASPLOS
2008
ACM
13 years 10 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
EMSOFT
2010
Springer
13 years 6 months ago
Initiating a design pattern catalog for embedded network systems
In the domain of desktop software, design patterns have had a profound impact; they are applied ubiquitously across a broad range of applications. Patterns serve both to promulgat...
Sally K. Wahba, Jason O. Hallstrom, Neelam Soundar...