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DAC
2003
ACM
14 years 19 days ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...
SIGGRAPH
1998
ACM
13 years 11 months ago
Exact Evaluation of Catmull-Clark Subdivision Surfaces at Arbitrary Parameter Values
In this paper we disprove the belief widespread within the computer graphics community that Catmull-Clark subdivision surfaces cannot be evaluated directly without explicitly subd...
Jos Stam
VRML
1998
ACM
13 years 11 months ago
VRML in Architectural Construction Documents: A Case Study
The Virtual Reality Modeling Language (VRML) and the World Wide Web (WWW) offer new opportunities to communicate an architect’s design intent throughout the design process. We h...
Dace A. Campbell
DAC
2008
ACM
13 years 9 months ago
Topology synthesis of analog circuits based on adaptively generated building blocks
This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topo...
Angan Das, Ranga Vemuri
WSC
1998
13 years 8 months ago
Windows-based Animation with PROOF
Proof AnimationTM is a family of products for animating discrete event simulations. Proof is available in a variety of versions, including an inexpensive, student version, midsize...
James O. Henriksen