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ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
16 years 3 months ago
Design Alternatives for Parallel Saturating Multioperand Adders
Parallel saturating multioperand adders significantly improve the performance of GSM speech coders by giving compilers and assembly language programmers the ability to paralleliz...
Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C....
ICCD
2001
IEEE
120views Hardware» more  ICCD 2001»
16 years 3 months ago
Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures
Filter cache has been proposed as an energy saving architectural feature [9]. A filter cache is placed between the CPU and the instruction cache (I-cache) to provide the instruct...
Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau
ICCAD
2001
IEEE
153views Hardware» more  ICCAD 2001»
16 years 3 months ago
The Sizing Rules Method for Analog Integrated Circuit Design
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
Helmut E. Graeb, Stephan Zizala, Josef Eckmueller,...
ICCAD
2001
IEEE
124views Hardware» more  ICCAD 2001»
16 years 3 months ago
Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs
Methods based on Boolean satisfiability (SAT) typically use a Conjunctive Normal Form (CNF) representation of the Boolean formula, and exploit the structure of the given problem ...
Aarti Gupta, Zijiang Yang, Pranav Ashar, Lintao Zh...
ICCAD
2001
IEEE
127views Hardware» more  ICCAD 2001»
16 years 3 months ago
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...
Gang Qu