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ICCD
1992
IEEE
82views Hardware» more  ICCD 1992»
14 years 1 months ago
A Comparison of Self-Timed Design Using FPGA, CMOS, and GaAs Technologies
Asynchronous or self-timed systems that do not rely on a global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in ...
Erik Brunvand, Nick Michell, Kent F. Smith
FPGA
1995
ACM
136views FPGA» more  FPGA 1995»
14 years 1 months ago
A Field-Programmable Mixed-Analog-Digital Array
A novel field-programmable mixed-analog-digital array (FPMA) is proposed, which contains a field-programmable analog array, a field-programmable digital array, and a mixed-sign...
Paul Chow, P. Glenn Gulak
DSD
2008
IEEE
115views Hardware» more  DSD 2008»
14 years 4 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 3 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
14 years 3 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker