416 search results - page 26 / 84 » CMOL FPGA circuits |
MSE
2003
IEEE
14 years 4 months ago
2003
IEEE
A tool has been developed to automate the testing and grading of design projects implemented in reprogrammable hardware. The server allows multiple students to test circuits in FP...
FPGA
2008
ACM
14 years 14 days ago
2008
ACM
This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
VLSID
2007
IEEE
14 years 11 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
FPGA
2010
ACM
14 years 7 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
FPL
2009
Springer
14 years 3 months ago
2009
Springer
This paper presents a comparison between two technologies for reconfigurable circuits that are FPGA'se the FPAA's. The comparison is based on a case study of the area of...