416 search results - page 51 / 84 » CMOL FPGA circuits |
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
— This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a sea...
EH
1999
IEEE
14 years 2 months ago
1999
IEEE
An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16bit address space into an 8-bit one. The target technology is FPGA,...
FCCM
1998
IEEE
14 years 2 months ago
1998
IEEE
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
VTS
2005
IEEE
14 years 3 months ago
2005
IEEE
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs, since SEUs in configuration bits of FPGAs result in permanent errors in the mapped...
FPGA
2009
ACM
14 years 4 months ago
2009
ACM
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...