416 search results - page 72 / 84 » CMOL FPGA circuits |
DSD
2008
IEEE
14 years 4 months ago
2008
IEEE
This paper proposes a design method and programmable architectures for numerical function generators (NFGs) of two-variable functions. To realize a two-variable function in hardwa...
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
AHS
2006
IEEE
14 years 3 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
APCCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
— A VLSI hardware architecture for the on-chip implementation of a first-order 3D IIR fully-multiplexed frequencyplanar filter module (FMFPM) is proposed. FMFPMs may be employed ...
ISCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
—We present an efficient approach for on-chip frequency response measurement, including phase and gain, of analog circuitry in mixed-signal systems. The approach uses direct digi...