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MICRO
2007
IEEE
144views Hardware» more  MICRO 2007»
14 years 3 months ago
Process Variation Tolerant 3T1D-Based Cache Architectures
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Bro...
ICCSA
2004
Springer
14 years 2 months ago
Semantic Completeness in Sub-ontology Extraction Using Distributed Methods
The use of ontologies lies at the very heart of the newly emerging era of Semantic Web. They provide a shared conceptualization of some domain that may be communicated between peop...
Mehul Bhatt, Carlo Wouters, Andrew Flahive, J. Wen...
NETGAMES
2006
ACM
14 years 2 months ago
Peer clustering: a hybrid approach to distributed virtual environments
This paper proposes a hybrid architecture for distributed virtual environments, utilizing servers alongside peer-to-peer components. Current research into peer-based systems seeks...
Alvin Chen, Richard R. Muntz
DSN
2005
IEEE
14 years 2 months ago
ReStore: Symptom Based Soft Error Detection in Microprocessors
Device scaling and large scale integration have led to growing concerns about soft errors in microprocessors. To date, in all but the most demanding applications, implementing par...
Nicholas J. Wang, Sanjay J. Patel
GCC
2005
Springer
14 years 2 months ago
Coordinated Placement and Replacement for Grid-Based Hierarchical Web Caches
Web caching has been well accepted as a viable method for saving network bandwidth and reducing user access latency. To provide cache sharing on a large scale, hierarchical web cac...
Wenzhong Li, Kun Wu, Xu Ping, Ye Tao, Sanglu Lu, D...