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ICCD
2004
IEEE
158views Hardware» more  ICCD 2004»
14 years 4 months ago
An Embedded Reconfigurable SIMD DSP with Capability of Dimension-Controllable Vector Processing
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
Liang Han, Jie Chen, Chaoxian Zhou, Ying Li, Xin Z...
FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
14 years 1 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
ERSA
2010
186views Hardware» more  ERSA 2010»
13 years 5 months ago
DAPR: Design Automation for Partially Reconfigurable FPGAs
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Shaon Yousuf, Ann Gordon-Ross
ERSA
2010
137views Hardware» more  ERSA 2010»
13 years 5 months ago
An Automated Scheduling and Partitioning Algorithm for Scalable Reconfigurable Computing Systems
As reconfigurable computing (RC) platforms are becoming increasingly large-scale and heterogeneous, efficiently scheduling and partitioning applications on these platforms is a gro...
Casey Reardon, Alan D. George, Greg Stitt, Herman ...
FPL
2005
Springer
125views Hardware» more  FPL 2005»
14 years 1 months ago
Low-Cost Fully Reconfigurable Data-Path for FPGA-Based Multimedia Processor
This paper describes novel data-path architecture for FPGA-based multimedia processors. The proposed circuit can adapt itself at run-time to different operations and data wordleng...
Marco Lanuzza, Stefania Perri, Martin Margala, Pas...