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» Cache Injection on Bus Based Multiprocessors
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SC
1992
ACM
13 years 11 months ago
Willow: A Scalable Shared Memory Multiprocessor
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
John K. Bennett, Sandhya Dwarkadas, Jay A. Greenwo...
NOCS
2009
IEEE
14 years 1 months ago
Best of both worlds: A bus enhanced NoC (BENoC)
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...
Ran Manevich, Isask'har Walter, Israel Cidon, Avin...
ICPP
1990
IEEE
13 years 11 months ago
Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes
As multiprocessors are scaled beyond single bus systems, there is renewed interest in directory-based cache coherence schemes. These schemes rely on a directory to keep track of a...
Anoop Gupta, Wolf-Dietrich Weber, Todd C. Mowry
ISCA
2000
IEEE
78views Hardware» more  ISCA 2000»
13 years 11 months ago
On the value locality of store instructions
Value locality, a recently discovered program attribute that describes the likelihood of the recurrence of previously-seen program values, has been studied enthusiastically in the...
Kevin M. Lepak, Mikko H. Lipasti
IPPS
2000
IEEE
13 years 11 months ago
Fault-Tolerant Distributed-Shared-Memory on a Broadcast-Based Interconnection Network
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
Diana Hecht, Constantine Katsinis