67 search results - page 13 / 14 » Cache Performance of Combinator Graph Reduction |
ESTIMEDIA
2007
Springer
14 years 1 months ago
2007
Springer
Today’s embedded applications often consist of multiple concurrent tasks. These tasks are decomposed into subtasks which are in turn assigned and scheduled on multiple different...
CF
2009
ACM
14 years 2 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
SAMOS
2004
Springer
14 years 29 days ago
2004
Springer
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...
NIPS
2008
13 years 9 months ago
2008
Query expansion is a long-studied approach for improving retrieval effectiveness by enhancing the user's original query with additional related words. Current algorithms for ...
VLSID
2010
IEEE
13 years 11 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...