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COMPUTER
2000
138views more  COMPUTER 2000»
13 years 9 months ago
Making Pointer-Based Data Structures Cache Conscious
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
WWW
2008
ACM
14 years 10 months ago
Static query result caching revisited
Query result caching is an important mechanism for search engine efficiency. In this study, we first review several query features that are used to determine the contents of a sta...
Özgür Ulusoy, Ismail Sengör Alting&...
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
14 years 6 months ago
Exploring the interplay of yield, area, and performance in processor caches
The deployment of future deep submicron technology calls for a careful review of existing cache organizations and design practices in terms of yield and performance. This paper pr...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
ISVLSI
2007
IEEE
204views VLSI» more  ISVLSI 2007»
14 years 4 months ago
Designing Memory Subsystems Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz
PCI
2005
Springer
14 years 3 months ago
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Evangelia Athanasaki, Kornilios Kourtis, Nikos Ana...