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ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
14 years 3 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
WWW
2002
ACM
14 years 11 months ago
Aliasing on the world wide web: prevalence and performance implications
Aliasing occurs in Web transactions when requests containing different URLs elicit replies containing identical data payloads. Conventional caches associate stored data with URLs ...
Terence Kelly, Jeffrey C. Mogul
WWW
2005
ACM
14 years 11 months ago
Hierarchical substring caching for efficient content distribution to low-bandwidth clients
While overall bandwidth in the internet has grown rapidly over the last few years, and an increasing number of clients enjoy broadband connectivity, many others still access the i...
Utku Irmak, Torsten Suel
MICRO
2006
IEEE
82views Hardware» more  MICRO 2006»
14 years 5 months ago
Yield-Aware Cache Architectures
One of the major issues faced by the semiconductor industry today is that of reducing chip yields. As the process technologies have scaled to smaller feature sizes, chip yields ha...
Serkan Ozdemir, Debjit Sinha, Gokhan Memik, Jonath...
HPCA
2009
IEEE
14 years 11 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...