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TVLSI
2010
13 years 3 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
GECCO
2010
Springer
158views Optimization» more  GECCO 2010»
14 years 1 months ago
A genetic algorithm to improve linux kernel performance on resource-constrained devices
As computers become increasingly mobile, users demand more functionality, longer battery-life, and better performance from mobile devices. In response, chipset fabricators are foc...
James Kukunas, Robert D. Cupper, Gregory M. Kapfha...
PDPTA
2007
13 years 9 months ago
Improving Performance and Server Resource Usage with Page
As web engineering evolves web based applications complexity grows in higher orders of magnitude. Is not uncommon to find in today web based applications complex and time consumin...
León Welicki, Oscar Sanjuán Mart&iac...
IPPS
2010
IEEE
13 years 6 months ago
Tile QR factorization with parallel panel processing for multicore architectures
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
Bilel Hadri, Hatem Ltaief, Emmanuel Agullo, Jack D...
SIGMOD
2004
ACM
204views Database» more  SIGMOD 2004»
14 years 8 months ago
Buffering Database Operations for Enhanced Instruction Cache Performance
As more and more query processing work can be done in main memory, memory access is becoming a significant cost component of database operations. Recent database research has show...
Jingren Zhou, Kenneth A. Ross