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» Cache modeling in probabilistic execution time analysis
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TII
2010
124views Education» more  TII 2010»
13 years 2 months ago
Address-Independent Estimation of the Worst-case Memory Performance
Abstract--Real-time systems are subject to temporal constraints and require a schedulability analysis to ensure that task execution finishes within lower and upper specified bounds...
Basilio B. Fraguela, Diego Andrade, Ramon Doallo
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
13 years 11 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
MOBIQUITOUS
2007
IEEE
14 years 1 months ago
A SpatioTemporal Placement Model for Caching Location Dependent Queries
Client side caching of location dependent queries is an important technique for improving performance of location-based services. Most of the existing research in this area has fo...
Anand Murugappan, Ling Liu
DATE
2007
IEEE
128views Hardware» more  DATE 2007»
14 years 1 months ago
Accounting for cache-related preemption delay in dynamic priority schedulability analysis
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
Lei Ju, Samarjit Chakraborty, Abhik Roychoudhury
JUCS
2000
120views more  JUCS 2000»
13 years 7 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi