1873 search results - page 327 / 375 » Cache performance for multimedia applications |
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
SIGMOD
2009
ACM
14 years 7 months ago
2009
ACM
With large amounts of correlated probabilistic data being generated in a wide range of application domains including sensor networks, information extraction, event detection etc.,...
CLUSTER
2009
IEEE
14 years 2 months ago
2009
IEEE
—Current leadership-class machines suffer from a significant imbalance between their computational power and their I/O bandwidth. While Moore’s law ensures that the computatio...
CF
2009
ACM
14 years 2 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...