380 search results - page 66 / 76 » Cache-oblivious simulation of parallel programs |
ESTIMEDIA
2007
Springer
14 years 1 months ago
2007
Springer
—Modern compression standards such as H.264, DivX, or VC-1 provide astonishing quality at the costs of steadily increasing processing requirements. Therefore, efficient solution...
HPCC
2009
Springer
13 years 11 months ago
2009
Springer
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...
SAC
2005
ACM
14 years 28 days ago
2005
ACM
Simulations of complex scientific phenomena involve the execution of massively parallel computer programs. These simulation programs generate large-scale multidimensional data set...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...