169 search results - page 13 / 34 » Caching Intermediate Results for Program Improvement |
ISCA
2010
IEEE
14 years 23 days ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
JSA
2000
13 years 7 months ago
2000
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...
ICPP
1996
IEEE
13 years 12 months ago
1996
IEEE
- Among all software cache coherence strategaes, the ones that are based on the concept of tamestamps show the greatest potentaal an terms of cache performance. The early tamestamp...
TJS
2008
13 years 7 months ago
2008
Abstract. Traditionally, loop nests are fused only when the data dependences in the loop nests are not violated. This paper presents a new loop fusion algorithm that is capable of ...
ISCA
1993
IEEE
13 years 11 months ago
1993
IEEE
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...