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ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
ICNP
2006
IEEE
14 years 1 months ago
Benefit-based Data Caching in Ad Hoc Networks
—Data caching can significantly improve the efficiency of information access in a wireless ad hoc network by reducing the access latency and bandwidth usage. However, designing e...
Bin Tang, Himanshu Gupta, Samir R. Das
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
14 years 1 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
GI
1999
Springer
13 years 12 months ago
Caching in Networks
d Abstract) Friedhelm Meyer auf der Heide   Berthold V¨ocking† Matthias Westermann   We present a general framework for the development of online algorithms for data manageme...
Matthias Westermann
GLOBECOM
2010
IEEE
13 years 5 months ago
A Distributed Public Key Caching Scheme in Large Wireless Networks
When asymmetric cryptography techniques are used in wireless networks, the public keys of the nodes need to be widely available and signed by a Certificate Authority (CA). However,...
Yuan Kong, Jing Deng, Stephen R. Tate