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GLOBECOM
2007
IEEE
14 years 4 months ago
A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders
Abstract—A bit-node centric decoder architecture for lowdensity parity-check codes is proposed. This architecture performs the optimum sum-product algorithm. A bit node processin...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...
ICIAP
2009
ACM
14 years 10 months ago
Connected Component Labeling Techniques on Modern Architectures
In this paper we present an overview of the historical evolution of connected component labeling algorithms, and in particular the ones applied on images stored in raster scan orde...
Costantino Grana, Daniele Borghesani, Rita Cucchia...
AIIA
2007
Springer
14 years 4 months ago
Harvesting Relational and Structured Knowledge for Ontology Building in the WPro Architecture
We present two algorithms for supporting semi-automatic ontology building, integrated in WPro, a new architecture for ontology learning from Web documents. The first algorithm auto...
Daniele Bagni, Marco Cappella, Maria Teresa Pazien...
EGC
2005
Springer
14 years 3 months ago
A Service Oriented Architecture for Decision Making in Engineering Design
Abstract. Decision making in engineering design can be effectively addressed by using genetic algorithms to solve multi-objective problems. These multi-objective genetic algorithm...
Alex Shenfield, Peter J. Fleming
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 3 months ago
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...
Jingcao Hu, Radu Marculescu