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VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 10 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
IPPS
2006
IEEE
14 years 4 months ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
CISIS
2008
IEEE
14 years 4 months ago
Latency Impact on Spin-Lock Algorithms for Modern Shared Memory Multiprocessors
In 2006, John Mellor-Crummey and Michael Scott received the Dijkstra Prize in Distributed Computing. This prize was for their 1991 paper on algorithms for scalable synchronization ...
Jan Christian Meyer, Anne C. Elster
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
14 years 3 months ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar
ICNS
2006
IEEE
14 years 4 months ago
Anycast Algorithms Supporting Optical Burst Switched Grid Networks
— In this paper we consider implementing optical burst switching as a technology for building Grids with computationally intensive requirements. This architecture has been referr...
Marc De Leenheer, Farid Farahmand, Kejie Lu, Tao Z...