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NIXDORF
1992
116views Hardware» more  NIXDORF 1992»
14 years 1 months ago
Programmable Active Memories: A Performance Assessment
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
Patrice Bertin, Didier Roncin, Jean Vuillemin
DAC
2007
ACM
14 years 26 days ago
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for secondorder sys...
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGau...
DAC
2010
ACM
14 years 26 days ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov
GRID
2007
Springer
14 years 25 days ago
Global-scale peer-to-peer file services with DFS
The global inter-networking infrastructure that has become essential for contemporary day-to-day computing and communication tasks, has also enabled the deployment of several large...
Antony Chazapis, Georgios Tsoukalas, Georgios Veri...
CF
2006
ACM
14 years 20 days ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao