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» Can Parallel Algorithms Enhance Serial Implementation
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FCCM
2008
IEEE
205views VLSI» more  FCCM 2008»
14 years 2 months ago
Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation
The recent turmoil in global credit markets has demonstrated the need for advanced modelling of credit risk, which can take into account the effects of changing economic condition...
David B. Thomas, Wayne Luk
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
14 years 2 months ago
A non-intrusive isolation approach for soft cores
Cost effective SOC test strongly hinges on parallel, independent test of SOC cores, which can only be ensured through proper core isolation techniques. While a core isolation mech...
Ozgur Sinanoglu, Tsvetomir Petrov
VTS
2000
IEEE
89views Hardware» more  VTS 2000»
14 years 3 days ago
Fault Escapes in Duplex Systems
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
Subhasish Mitra, Nirmal R. Saxena, Edward J. McClu...
DAC
2005
ACM
13 years 9 months ago
Design methodology for IC manufacturability based on regular logic-bricks
Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and de...
V. Kheterpal, V. Rovner, T. G. Hersan, D. Motiani,...
29
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PODC
2009
ACM
14 years 8 months ago
Dynamic atomic storage without consensus
This paper deals with the emulation of atomic read/write (R/W) storage in dynamic asynchronous message passing systems. In static settings, it is well known that atomic R/W storag...
Marcos Kawazoe Aguilera, Idit Keidar, Dahlia Malkh...