Sciweavers

1333 search results - page 208 / 267
» Categorial Minimalism
Sort
View
CODES
2008
IEEE
14 years 3 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
HPDC
2008
IEEE
14 years 3 months ago
Combining batch execution and leasing using virtual machines
As cluster computers are used for a wider range of applications, we encounter the need to deliver resources at particular times, to meet particular deadlines, and/or at the same t...
Borja Sotomayor, Kate Keahey, Ian T. Foster
CODES
2007
IEEE
14 years 3 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
CODES
2007
IEEE
14 years 3 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
DATE
2007
IEEE
126views Hardware» more  DATE 2007»
14 years 3 months ago
The ARTEMIS cross-domain architecture for embedded systems
platform and a suite of abstract components with which new developments in different application domains can be engineered with minimal effort [1]p.16. Generic platforms, or refere...
Hermann Kopetz