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» Cell Broadband Engine processor: Design and implementation
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HEURISTICS
2000
127views more  HEURISTICS 2000»
13 years 7 months ago
Fast, Efficient Equipment Placement Heuristics for Broadband Switched or Internet Router Networks
Planning and designing the next generation of IP router or switched broadband networks seems a daunting challenge considering the many complex, interacting factors affecting the p...
Joel W. Gannett
VLDB
2007
ACM
121views Database» more  VLDB 2007»
14 years 1 months ago
CellSort: High Performance Sorting on the Cell Processor
In this paper we describe the design and implementation of CellSort − a high performance distributed sort algorithm for the Cell processor. We design CellSort as a distributed b...
Bugra Gedik, Rajesh Bordawekar, Philip S. Yu
ARITH
2005
IEEE
14 years 1 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
INFOCOM
1992
IEEE
13 years 11 months ago
Design of Virtual Channel Queue in an ATM Broadband Terminal Adaptor
In order to take advantage of the low entry cost of the future public ATM (asynchronous transfer mode) network with shared facilities, it is highly desirable to interconnect diffe...
H. Jonathan Chao, Donald E. Smith
DATE
2004
IEEE
149views Hardware» more  DATE 2004»
13 years 11 months ago
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...
Kris Tiri, Ingrid Verbauwhede