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» Cell architecture for nanoelectronic design
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DAC
2010
ACM
13 years 8 months ago
Detecting tangled logic structures in VLSI netlists
This work proposes a new problem of identifying large and tangled logic structures in a synthesized netlist. Large groups of cells that are highly interconnected to each other can...
Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li...
SLIP
2009
ACM
14 years 2 months ago
Honeycomb-structured computational interconnects and their scalable extension to spherical domains
The present paper is part of a larger effort to redesign, from the ground up, the best possible interconnect topologies for switchless multiprocessor computer systems. We focus he...
Joseph B. Cessna, Thomas R. Bewley
TC
2010
13 years 5 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
DAC
2009
ACM
13 years 11 months ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan
DAC
2004
ACM
13 years 11 months ago
Enabling energy efficiency in via-patterned gate array devices
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
R. Reed Taylor, Herman Schmit