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» Cell delay analysis based on rate-of-current change
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VLSID
2007
IEEE
146views VLSI» more  VLSID 2007»
14 years 8 months ago
Architecting Microprocessor Components in 3D Design Space
Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional ...
Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang 0004,...
ICDCS
1997
IEEE
13 years 12 months ago
Connection Admission Control for Hard Real-Time Communication in ATM Networks
Connection Admission Control (CAC) is needed in ATM networks to provide Quality of Service (QoS) guarantees to real-time connections. This paper presents a CAC scheme based on a b...
Qin Zheng, Tetsuya Yokotani, Tatsuki Ichihashi, Ya...
IPMI
2007
Springer
14 years 8 months ago
Comparing Pairwise and Simultaneous Joint Registrations of Decorrelating Interval Exams Using Entropic Graphs
The interest in registering a set of images has quickly risen in the field of medical image analysis. Mutual information (MI) based methods are well-established for pairwise regist...
Bing Ma, Ramkrishnan Narayanan, Hyunjin Park, Alfr...
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
14 years 2 months ago
EPIC: Ending Piracy of Integrated Circuits
As semiconductor manufacturing requires greater capital investments, the use of contract foundries has grown dramatically, increasing exposure to mask theft and unauthorized exces...
Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov
DSN
2008
IEEE
14 years 2 months ago
TCP covert timing channels: Design and detection
Exploiting packets’ timing information for covert communication in the Internet has been explored by several network timing channels and watermarking schemes. Several of them em...
Xiapu Luo, Edmond W. W. Chan, Rocky K. C. Chang