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» Certification of Thread Context Switching
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TLDI
2010
ACM
210views Formal Methods» more  TLDI 2010»
14 years 4 months ago
Effects for cooperable and serializable threads
Reasoning about the correctness of multithreaded programs is complicated by the potential for unexpected interference between threads. Previous work on controlling thread interfer...
Jaeheon Yi, Cormac Flanagan
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 11 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
CASES
2003
ACM
14 years 27 days ago
Extending STI for demanding hard-real-time systems
Software thread integration (STI) is a compilation technique which enables the efficient use of an application’s fine-grain idle time on generic processors without special hardw...
Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh See...
HPCA
2011
IEEE
12 years 11 months ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
APDC
1997
13 years 9 months ago
Language Support for Synchronous Parallel Critical Sections
We introduce a new parallel programming paradigm, namely synchronous parallel critical sections. Such parallel critical sections must be seen in the context of switching between s...
Christoph W. Keßler, Helmut Seidl