To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkar...
Embedded devices like smart cards can now run multiple interacting applications. A particular challenge in this domain is to dynamically integrate diverse security policies. In th...
Cross-core application interference due to contention for shared on-chip and off-chip resources pose a significant challenge to providing application level quality of service (Qo...
Jason Mars, Neil Vachharajani, Robert Hundt, Mary ...
Abstract. Computing tight performance bounds in feed-forward networks under general assumptions about arrival and server models has turned out to be a challenging problem. Recently...