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» Challenges in Physical Chip Design
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ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 10 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
DAC
1996
ACM
14 years 25 days ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten
DSD
2004
IEEE
135views Hardware» more  DSD 2004»
14 years 12 days ago
Long Term Trends for Embedded System Design
An embedded system is an application specific electronic sub-system used in a larger system such as an appliance, an instrument or a vehicle. An embedded system is generally made ...
Ahmed Amine Jerraya
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
14 years 13 days ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
HPCA
2006
IEEE
14 years 9 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...